Contents

Cover

ESD Series

Title Page

Copyright

Dedication

About the Author

Preface

Acknowledgments

Chapter 1: Fundamentals of Electrostatics

1.1 Introduction

1.2 Electrostatics

1.3 Triboelectric Charging – How does it Happen?

1.4 Conductors, Semiconductors, and Insulators

1.5 Static Dissipative Materials

1.6 ESD and Materials

1.7 Electrification and Coulomb's Law

1.8 Electromagnetism and Electrodynamics

1.9 Electrical Breakdown

1.10 Electroquasistatics and Magnetoquasistatics

1.11 Electrodynamics and Maxwell's Equations

1.12 Electrostatic Discharge (ESD)

1.13 Electromagnetic Compatibility (EMC)

1.14 Electromagnetic Interference (EMI)

1.15 Summary and Closing Comments

References

Chapter 2: Fundamentals of Manufacturing and Electrostatics

2.1 Materials, Tooling, Human Factors, and Electrostatic Discharge

2.2 Manufacturing Environment and Tooling

2.3 Manufacturing Equipment and ESD Manufacturing Problems

2.4 Manufacturing Materials

2.5 Measurement and Test Equipment

2.6 Grounding and Bonding Systems

2.7 Worksurfaces

2.8 Wrist Straps

2.9 Constant Monitors

2.10 Footwear

2.11 Floors

2.12 Personnel Grounding with Garments

2.13 Air Ionization

2.14 Seating

2.15 Carts

2.16 Packaging and Shipping

2.17 ESD Identification

2.18 ESD Program Management – Twelve Steps to Building an ESD Strategy

2.19 ESD Program Auditing

2.20 ESD On-Chip Protection

2.21 Summary and Closing Comments

References

Chapter 3: ESD, EOS, EMI, EMC and Latchup

3.1 ESD, EOS, EMI, EMC and Latchup

3.2 ESD Models

3.3 Electrical Overstress (EOS)

3.4 EMI

3.5 EMC

3.6 Latchup

3.7 Summary and Closing Comments

References

Chapter 4: System Level ESD

4.1 System Level Testing

4.2 When Systems and Chips Interact

4.3 ESD and System Level Failures

4.4 Electronic Systems

4.5 System Level Problems Today

4.6 Automobiles, ESD, EOS, and EMI

4.7 Aerospace Applications

4.8 ESD and System Level Test Models

4.9 IEC 61000-4-2

4.10 Human Metal Model (HMM)

4.11 Charged Board Model (CBM)

4.12 Cable Discharge Event (CDE)

4.13 Summary and Closing Comments

References

Chapter 5: Component Level Issues – Problems and Solutions

5.1 ESD Chip Protection – The Problem and the Cure

5.2 ESD Chip Level Design Solutions – Basics of Design Synthesis

5.3 ESD Chip Floor Planning – Basics of Design Layout and Synthesis

5.4 ESD Analog Circuit Design

5.5 ESD Radio Frequency (RF) Design

5.6 Summary and Closing Comments

References

Chapter 6: ESD in Systems – Problems and Solutions

6.1 ESD System Solutions from Largest to Smallest

6.2 Aerospace Solutions

6.3 Oil Tanker Solutions

6.4 Automobile Solutions

6.5 Computers – Servers

6.6 Mother Boards and Cards

6.7 System Level “On Board” ESD Protection

6.8 System Level Transient Solutions

6.9 Package-Level Mechanical ESD Solutions – Mechanical “Crowbars”

6.10 Disk Drive ESD Solutions

6.11 Semiconductor Chip Level Solutions – Floor Planning, Layout, and Architecture

6.12 Semiconductor Chip Solutions – Electrical Power Grid Design

6.13 ESD and EMC – When Chips Bring Down Systems

6.14 System Level and Component Level ESD Testing and System Level Response

6.15 EMC and ESD Scanning

6.16 Summary and Closing Comments

References

Chapter 7: Electrostatic Discharge (ESD) in the Future

7.1 What is in the Future for ESD?

7.2 Factories and Manufacturing

7.3 Photo-Masks and Reticles

7.4 Magnetic Recording Technology

7.5 Micro-Electromechanical (MEM) Devices

7.6 Micro-Motors

7.7 Micro-Electromechanical (MEM) RF Switches

7.8 Micro-electromechanical (MEM) Mirrors

7.9 Transistors

7.10 Silicon Nanowires

7.11 Carbon Nanotubes

7.12 Future Systems and System Designs

7.13 Summary and Closing Comments

References

Glossary

ESD Standards

ESD Association

Department of Defense

Military Standards

Index

ESD Series

By Steven H. Voldman

ESD Basics: From Semiconductor Manufacturing to Product Use
ISBN: 9780470979716
September 2012

ESD: Design and Synthesis
ISBN: 9780470685716
March 2011

ESD: Failure Mechanisms and Models
ISBN: 9780470511374
July 2009

Latchup
ISBN: 9780470016428
December 2007

ESD: RF Technology and Circuits
ISBN: 9780470847558
September 2006

ESD: Circuits and Devices
ISBN: 9780470847541
November 2005

ESD: Physics and Devices
ISBN: 9780470847534
September 2004

Upcoming titles:

ESD: Test and Characterization

Electrical Overstress (EOS): Devices, Circuits, and Systems

The ESD Handbook

This edition first published 2012

© 2012 John Wiley & Sons, Ltd

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Library of Congress Cataloging-in-Publication Data

Voldman, Steven H.

ESD basics : from semiconductor manufacturing to product use / Steven Voldman.

p. cm.

Includes bibliographical references and index.

ISBN 978-0-470-97971-6 (hardback)

1. Electronic apparatus and appliances–Design and construction. 2. Electric discharges. 3. Electronic apparatus and appliances–Protection. 4. Microelectronics. 5. Static eliminators. 6. Electrostatics. I. Title.

TK7836.V65 2012

621.3815–dc23

2012018125

A catalogue record for this book is available from the British Library.

Print ISBN: 9780470979716

To My Parents
Carl and Blossom Voldman

About the Author

Dr Steven H. Voldman is the first IEEE Fellow in the field of electrostatic discharge (ESD) for “Contributions in ESD protection in CMOS, Silicon On Insulator and Silicon Germanium Technology.” He received his B.S. in Engineering Science from University of Buffalo (1979); a first M.S. EE (1981) from Massachusetts Institute of Technology (MIT); a second degree EE Degree (Engineer Degree) from MIT; a MS Engineering Physics (1986) and a PhD in Electrical Engineering (EE) (1991) from University of Vermont under IBM's Resident Study Fellow program.

He was a member of the IBM development for 25 years working on semiconductor device physics, device design, and reliability (e.g., soft error rate (SER), hot electrons, leakage mechanisms, latchup and electrostatic discharge (ESD)). Steve Voldman has been involved in latchup technology development for 27 years. He worked on both technology and with product development in Bipolar SRAM, CMOS DRAM, CMOS logic, Silicon on Insulator (SOI), BiCMOS, Silicon Germanium (SiGe), RF CMOS, RF SOI, smart power, and image processing technologies. In 2008, he was a member of the Qimonda DRAM development team, working on 70, 58 and 48 nm CMOS technology. In 2008, he initiated a limited liability corporation (LLC), and he worked at headquarters in Hsinchu, Taiwan for Taiwan Semiconductor Manufacturing Corportion (TSMC) as part of the 45 nm ESD and latchup development team. He was a Senior Principal Engineer working for the Intersil Corporation on ESD and latchup development from 2009 to 2011. Since 2011, he is presently independent under Dr Steven H. Voldman LLC providing consulting, teaching, and patent litigation expert witness support.

Dr Voldman was chairman of the SEMATECH ESD Working Group from 1995 to 2000. In his SEMATECH Working Group, the effort focused on ESD technology benchmarking, the first transmission line pulse (TLP) standard development team, strategic planning, and JEDEC-ESD Association standards harmonization of the human body model (HBM) standard. From 2000 to 2010, as Chairman of the ESD Association Work Group on TLP and very-fast TLP (VF-TLP), his team was responsible for initiating the first standard practice and standards for TLP and VF-TLP. Steve Voldman has been a member of the ESD Association Board of Directors, and Education Committee. He initiated the “ESD on Campus” program which was established to bring ESD lectures and interaction to university faculty and students internationally; the ESD on Campus program has reached over 40 universities in the United States, Singapore, Taiwan, Malaysia, Philippines, Thailand, India, and China.

Dr Voldman teaches short courses and tutorials on ESD, latchup, and invention in the United States, China, Singapore, Malaysia, Taiwan, Sri Lanka, and Israel. He is a recipient of over 240 issued US patents, in the area of ESD and CMOS latchup. He has served as an expert witness in patent litigation cases associated with ESD and latchup.

Dr Voldman has also written articles for Scientific American and is an author of the first book series on ESD and latchup: ESD: Physics and Devices, ESD: Circuits and Devices, ESD: RF Technology and Circuits, Latchup, ESD: Failure Mechanisms and Models, and ESD: Design and Synthesis as well as a contributor to the books Silicon Germanium: Technology, Modeling and Design and Nanoelectronics: Nanowires, Molecular Electronics, and Nano-devices. In addition, the International Chinese editions of book ESD: Circuits and Devices and the text ESD: RF Technology and Circuit is also released.

Preface

This text, ESD Basics: From Semiconductor Manufacturing to Product Use was initiated on the need to produce a text that addresses fundamentals of electrostatic discharge from the manufacturing environment to today's products. As the manufacturing world evolves, semiconductor networks scale, and systems are changing, the needs and requirements for reliability and ESD protection are changing. A text is required that connects basic ESD phenomena to today's real world environment.

Whereas significant texts are available today to teach experts on ESD on-chip design, there is a need for non-experts, non-technical and layman to understand the problems facing the world today. Today, real world ESD and EMI issues surround us; from exploding gas tanks, electrostatic discharge problems in automobiles, cable-induced latchup of computer servers, to automotive noise related issues. Hence, there is a need for non-experts to understand the issues that revolve around us, and what do we do to avoid them.

This text has multiple goals.

The first goal of the text is to teach the basics of electrostatics, and tribo-electric charging and relate them to the electrostatic discharge processes in semiconductor manufacturing, handling and assembly. While teaching some fundamentals, I added some history as well.

The second goal of the text is to teach the electrostatic discharge (ESD), tribo-charging, electrical overstress (EOS), and latchup subject matter. The text opens the door on the issues of electromagnetic interference (EMI) and electromagnetic compatibility (EMC).

The third goal is to relate these processes to modern day chips, and systems in today's world. Hopefully, the examples of problems today will make it more relevant, entertaining and a little fun as well.

The fourth goal is to demonstrate how to protect semiconductor chips with on-chip protection networks.

The fifth goal is to expose the reader to ESD testing of both semiconductor chips and systems.

The sixth goal is to discuss where the future lies with ESD phenomena, standards, testing and future products.

The seventh goal is to provide a glimpse into the future with new nano-structures and nano-systems, and the anticipated electrostatic and electromagnetic issues aheadǃ

This text, ESD: From Semiconductor Manufacturing to Product Use will contain the following:

Chapter 1 introduces the reader to an overview of the language and fundamentals associated with electrostatics. In Chapter 1, a brief discussion of electrostatics, and tribo-electrical phenomena is weaved into the individuals, dates, and history: Thales of Miletus, Gray, Dufay, Franklin, Toepler, Faraday, Cavendish, Coulomb, to Maxwell – just to mention a few. The chapter then quickly fast-forwards to today's issues of electrostatic discharge (ESD), electrical overstress (EOS), latchup, electromagnetic interference (EMI), and electromagnetic compatibility (EMC) in components and systems.

Chapter 2 discusses electrostatic discharge control in manufacturing environments. In this chapter, the objective is to provide the reader with a taste of the issues, test methods, standards, and control programs in manufacturing to provide an ESD protected area.

In Chapter 3, the subject switches to focus on a deeper look at electrostatic discharge (ESD), electrical overstress (EOS), electromagnetic interference (EMI) and electromagnetic compatibility (EMC). Each of these fields has a vast number of publications, literature, and books. In the introduction, I have provided some of the language, terms, and testing standards.

In Chapter 4, system level concerns associated with ESD, EOS, latchup, EMI, and EMC have been discussed relevant to today's application and the future. A brief discussion of electrostatic issues in servers, laptops, hand-held devices, cell phones, disk drives, digital cameras, autos, and space applications was reviewed to educate the reader in the vast number of issues in today's electronic environment. System level ESD tests, such as IEC 61000-4-2, HMM, CDE, and CBM are discussed.

Chapter 5 focuses on semiconductor component solutions. The focus of the chapter is on “on-chip” ESD protection networks. ESD protection in digital, analog, and RF applications are discussed. In this chapter, ESD circuits schematics, layout, and semiconductor chip floor planning are also discussed.

Chapter 6 focuses on system level solutions. System level solutions being practiced today are shown for ESD, EMI, and EMC. New concepts such as system level EMC scanning techniques are discussed.

Chapter 7 discusses ESD protection for today's and tomorrow's nanostructure technology. As the dimensional scaling of devices approaches the nano-meter dimensions, all devices will have to address the implications of static charge, electrostatic discharge (ESD), electromagnetic interference (EMI), and electrical overstress (EOS). This will be true in photo-masks, magnetic recording devices, semiconductor devices, nano-wires to nano-tubes. This concluding chapter takes a look at micro-motors, micro-mirrors, RF MEM switches, and many novel devices.

This introductory text will hopefully pique your interest in the field of electrostatic discharge (ESD), electrical overstress (EOS), electromagnetic interference (EMI), and electromagnetic compatibility (EMC) – and teach how it relates to today's world. To establish a stronger knowledge of ESD protection, it is advisable to read the other texts ESD: Physics and Devices, ESD: Circuits and Technology, ESD: RF Circuits and Technology, ESD: Failure Mechanisms and Models, ESD: Design and Synthesis, and Latchup.

Enjoy the text, and enjoy the subject of ESD, EOS, latchup, EMI, and EMC phenomena.

Baruch HaShem (B”H)

Dr Steven H. Voldman
IEEE Fellow

Acknowledgments

I would like to thank the years of support from the SEMATECH, the ESD Association, the IEEE, and the JEDEC organizations. I would like to thank the IBM Corporation, Qimonda, Taiwan Semiconductor Manufacturing Corporation (TSMC), and the Intersil Corporation. The work in this text comes from thirty years of working with bipolar memory, DRAM memory, SRAM, NVRAMs, microprocessors, ASICs, mixed voltage, mixed signal, RF to power applications. I was fortunate to work in a wide number of technology teams, and with a wide breadth of customers. I was very fortunate to work in bipolar memory, CMOS DRAM, CMOS logic, ASICs, silicon on insulator (SOI), and Silicon Germanium (SiGe) from 1 μm to 45 nm technologies. I was very fortunate to be a member of talented technology and design teams that were both innovative, intelligent, and inventive. This provided opportunity to provide experimental concepts, and try new ideas in ESD design in applications and products.

I would like to thank the institutions that allowed me to teach and lecture at conferences, symposiums, industry, and universities; this gave me the motivation to develop the texts. I would like to thank faculty at the following universities: M.I.T., Stanford University, University of Central Florida (UCF), Vanderbilt University, University Illinois Urbana-Champaign (UIUC), University of California Riverside (UCR), University of Buffalo, National Chiao Tung University (NCTU), Tsin Hua University, National Technical University of Science and Technology (NTUST), National University of Singapore (NUS), Nanyang Technical University (NTU), Beijing University, Fudan University, Shanghai Jiao Tung University, Zheijang University, Huazhong University of Science and Technology (HUST), Universiti Sains Malaysia (USM), Universiti Putra Malaysia (UPM), Kolej Damansara Utama (KDU), Chulalongkorn University, Mahanakorn University, Kasetsart University, Thammasat University, and Mapua Institute of Technology.

I would like to say thank you for the years of support and the opportunity to provide lectures, invited talks, and tutorials to the Electrical Overstress/Electrostatic Discharge (EOS/ESD) Symposium, the International Reliability Physics Symposium (IRPS), the Taiwan Electrostatic Discharge Conference (T-ESDC), the International Electron Device Meeting (IEDM), the International Conference on Solid-State and Integrated Circuit Technology (ICSICT), the International Physical and Failure Analysis (IPFA), IEEE ASICON, and IEEE Intelligent Signal Processing And Communication Systems (ISPACS) Conference.

I would like to thank my many friends for twenty years in the ESD profession – Prof. Ming Dou Ker, Prof. J.J. Liou, Prof. Albert Wang, Prof. Elyse Rosenbaum, Prof. Jo Chiranut Sa-ngiamsak, Timothy J. Maloney, Charvaka Duvvury, Eugene Worley, Robert Ashton, Yehuda Smooha, Vladislav Vashchenko, Ann Concannon, Albert Wallash, Vessilin Vassilev, Warren Anderson, Marie Denison, Alan Righter, Andrew Olney, Bruce Atwood, Jon Barth, Evan Grund, David Bennett, Tom Meuse, Michael Hopkins, Yoon Huh, Jin Min, Keichi Hasegawa, Nathan Peachey, Kathy Muhonen, Augusto Tazzoli, Gaudenzio Menneghesso, Marise BaFleur, Jeremy Smith, Nisha Ram, Swee K. Lau, Tom Diep, Lifang Lou, Stephen Beebe, Michael Chaine, Pee Ya Tan, Theo Smedes, Markus Mergens, Christian Russ, Harold Gossner, Wolfgang Stadler, Ming Hsiang Song, J.C. Tseng, J.H. Lee, Michael Wu, Erin Liao, Stephen Gaul, Jean-Michel Tschann, Tze Wee Chen, Shu Qing Cao, Slavica Malobabic, David Ellis, Blerina Aliaj, Lin Lin, David Swenson, Donn Bellmore, Ed Chase, Doug Smith, W. Greason, Stephen Halperin, Tom Albano, Ted Dangelmayer, Terry Welsher, John Kinnear, and Ron Gibson.

I would like to thank the ESD Association office for the support in the area of publications, standards developments, and conference activities. I would also like to thank the publisher and staff of John Wiley & Sons, for including this text as part of the ESD book series.

To my children, Aaron Samuel Voldman and Rachel Pesha Voldman, good luck to both of you in the future.

To my wife Annie Brown Voldman – thank you for the support and years of work.

And to my parents, Carl and Blossom Voldman.

Baruch HaShem (B”H)

Dr Steven H. Voldman
IEEE Fellow

Chapter 1

Fundamentals of Electrostatics

1.1 Introduction

We are all familiar with electrostatic discharge (ESD): shuffle your feet across a shag carpet in your favorite sneakers, touch a piece of metal, and zap! For a human being, we let out an “ouch!”; but for micro-electronics to nano-electronics, this can lead to product failures [1].

But, today, and in the future, static charge will remain an important industrial issue for the production of both electronic devices to systems. It is also an issue in fields of munitions, explosives, chemical, and material industries. Any industry where there is a risk of impact to quality, yield, degradation, or physical harm will be concerned with electrostatic discharge (ESD), electrical overstress (EOS), electromagnetic interference (EMI), and electromagnetic compatibility (EMC).

Lesen Sie weiter in der vollständigen Ausgabe!

Lesen Sie weiter in der vollständigen Ausgabe!

Lesen Sie weiter in der vollständigen Ausgabe!

Lesen Sie weiter in der vollständigen Ausgabe!

Lesen Sie weiter in der vollständigen Ausgabe!

Lesen Sie weiter in der vollständigen Ausgabe!

Lesen Sie weiter in der vollständigen Ausgabe!

Lesen Sie weiter in der vollständigen Ausgabe!

Lesen Sie weiter in der vollständigen Ausgabe!